This invention relates to the testing, sorting, and packaging of semiconductor memory devices, memory chips, memory modules, and defective memory components.
Due to the yield limitation of semiconductor fabrication process, a semiconductor memory wafer usually contains defective memory devices. These defective memory devices are declared as unusable because the defects within the device are beyond the repairing capability of the device fabrication process.
We may categorize the types of defective memory devices by the defective data bit positions. For a memory device with eight data bits, there are 255 types of defective memory devices. The large number of defective memory types complicates the issue regarding to the testing, sorting, and packaging of these memory devices.
This invention proposes a method and apparatus to sort memory device dies and chips in order to utilize partially defective memory devices to construct usable memory chips or modules that meet the specification of a functional package.
The present invention provides a method that reduces the complexity in the device and chip testing, sorting, and packaging.
This invention provides a method to reduce the large number of defective memory device types.
This invention provides a method that automates the testing, sorting, and packaging process to minimize human intervention.
This invention provides a method that maximizes the usage of functional memory data bits in the partially defective memory devices.